some of these ettus boxes have serious (& expensive) fpga's in them. seems waste if pass data adc ethernet bus. when build in grc how signal processing done in fpga & how done pc?
gnu radio host software. so, processing program in gnu radio done on cpus, unless use special hardware accelerator blocks, example:
- gr-theano: gpu accelleration
- gr-fosphor: opencl-accelerated waterfall spectrogram
- gr-ettus: employing rfnoc implement specific functionality on x3x0's fpga. requires build fpga image including functionality use gr-ettus block.
generally, fpga in x3x0 lot: physically, adc , dac of x3x0 running @ 200mhz default, , can select integer fractions of "user sampling rate"; interpolation/decimation from/to rate match these hardware clocks done in fpga relatively large filters. also, can digitally shift signal in frequency setting digital tuning offset, done cordic in fpga.
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